February 10, 2018

Willy M.C. Sansen, Johan Huijsing, Rudy J. van de Plassche's Analog Circuit Design: Most RF Circuits, SIGMA-Delta PDF

By Willy M.C. Sansen, Johan Huijsing, Rudy J. van de Plassche

ISBN-10: 0792397762

ISBN-13: 9780792397762

Comprises revised instructional papers from an April 1996 workshop. half I demonstrates the viability of utilizing CMOS for high-frequency verbal exchange purposes, and explores instant conversation purposes. half II describes the newest advancements in analog-to- electronic and digital-to-analog converters, their purposes in parts akin to telecommunication and audio platforms, and CAD instruments for the layout of such converters. half III offers the newest learn and strategies for designing translinear circuits utilizing either bipolar and CMOS applied sciences. For analog layout engineers, researchers, and complex scholars.

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Additional resources for Analog Circuit Design: Most RF Circuits, SIGMA-Delta Converters and Translinear Circuits

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Lau, F. J. R. Clément and D. Su, “Experimental results and simulation of substrate noise coupling via planar spiral inductor in RF Ics,” IEEE International Electron Device Meeting, pp. 325-328, December 1997. [9] T. Blalack, J. Lau, F. Clément, and B. Wooley, “Experimental results and modeling of noise coupling in a lightly doped substrate,” IEEE International Electron Device Meeting, pp. 623-626, December 1996. [10] K. Makie-Fukuda, T. Kikuchi, T. Matsuura, and M. Hotta, “Measurement of digital noise in mixed-signal integrated circuits,” IEEE Journal of Solid-State Circuits, Vol.

15] R. Gharpurey and S. Hosur, “Transform domain techniques for efficient extraction of substrate parasitics,” proceedings IEEE International Conference on Computer-Aided Design, pp. 461-467, December 1997 [16] J. Casalta, X. Aragones, and A. Rubio, “Substrate coupling evaluation in BiCMOS technology,” IEEE Journal of Solid-State Circuits, Vol. 32, no. 4, pp. 598-603, April 1997. [17] M. Pfost, H. Rein, and T. Holzwarth, “Modeling substrate effects in the design of highspeed Si-Bipolar ICs,” IEEE Journal of Solid-State Circuits, Vol.

These simulations are shown in Figure 2-8. The 0-nH simulation shows the minimum amount of substrate noise that will be generated, only by capacitive coupling from the source and drain nodes. This substrate noise level can only be reduced by increasing the number of substrate contacts to the quiet digital ground. The simulation with the 1-nH inductor shows a much larger substrate noise signal, now dominated by noise coupling from the power supply. For even larger inductance values (10 nH), the maximum substrate noise will be caused by ringing of the damped LC tank, formed by the inductance and the on-chip capacitance with series resistance over the power supply.

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Analog Circuit Design: Most RF Circuits, SIGMA-Delta Converters and Translinear Circuits by Willy M.C. Sansen, Johan Huijsing, Rudy J. van de Plassche


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